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il600a series isoloop ? is a registered trademark of nve corporation. *u.s. patent number 5,831,426; 6,300,617 and others. rev. t nve corporation 11409 valley view road, eden prairie, mn 55344-3617 phone: (952) 829-9217 fax: (952) 829-9189 www.isoloop.com ?nve corporation passive-input digital isolators ? open drain outputs functional diagrams in 1 out 2 in 1 in 1 in 2 gnd out 1 in 2 v oe out 1 gnd out 1 out 2 gnd gnd v dd2 v dd1 il610a il611a il612a features x 10 mbps data rate x flexible inputs with very wide input voltage range x failsafe output (logic high output for zero coil current) x output enable (il610a) x 3.3 v or 5 v power supply x 2500 v rms isolation (1 minute) x low power dissipation x 40c to 85c temperature range x 20 kv/s transient immunity x low emc footprint x ul1577 and iec61010-2001 approval x 8-pin msop, soic, and pdip packages x bare die available applications x general purpose optocoupler replacement x wired-or alarms x spi interface x i 2 c x rs-485, rs-422, or rs-232 x space-critical multi-channel applications x isolated relays and actuators description the il600a-series are isolated signal couplers with open- drain outputs. they have a similar interface but better performance and higher package density than optocouplers. the devices are manufactured with nve?s patented* isoloop ? spintronic giant magnetoresistive (gmr) technology for small size, high speed, and low power. a single resistor sets the maximum input current for voltages above 0.5 v. a capacitor in pa rallel with the current-limit resistor provides improved dynamic performance. these versatile components simplify inventory requirements by replacing a variety of opt ocouplers, functioning over a wide range of data rates, edge speeds, and power supply levels. the devices are available in msop, soic, and pdip packages, as well as bare die.
il600a series 2 absolute maximum ratings (1) parameters symbol min. typ. max. units test conditions storage temperature t s 55 150 c ambient operating temperature t a 55 125 c supply voltage v dd 0.5 7 v dc input current i in 25 25 ma ac input current (single-ended input) i in 35 35 ma ac input current (differential input) i in 75 75 ma output voltage v o 0.5 v dd +1.5 v maximum output current i o 10 10 ma esd 2 kv hbm note 1: operating at absolute maximum ratings will not damage the device. parametric performance is not guaranteed at absolute maximum ratings. recommended operating conditions parameters symbol min. typ. max. units test conditions ambient operating temperature t a 40 85 c supply voltage v dd 3.0 5.5 v input current low i in l ow 5 10 ma input current high i in h igh 10 0.5 ma differential input current low i in l ow 5 60 ma differential input current high i in h igh 60 5 ma current flow direction defined as positive when flowing into the coil terminal and out coil+ open drain reverse voltage v sd 0.5 v open drain voltage v ds 6.5 v open drain load current i od 7 ma common mode input voltage v cm 400 v rms insulation specifications parameters symbol min. typ. max. units test conditions creepage distance (external) msop 3.01 mm 0.15'' soic 4.03 mm 0.3'' pdip 7.08 mm internal isolation distance 9 p m leakage current 0.2 p a 240 v rms , 60 hz barrier impedance >10 14 ||7 : || pf rated voltage (1minute; msop) v iso 1,000 v ac 50 hz to 60 hz rated voltage (1 min.; soic & pdip) v iso 2,500 v ac 50 hz to 60 hz safety and approvals iec61010-2001 tuv certificate numbers: n1502812, n1502812-101 classification: reinforced insulation model package pollution degree material group max. working voltage il610a-2, il611a-2, il612a-2 pdip ii iii 300 v rms il610a-3, il611a-3, il612a-3 soic (0.15") ii iii 150 v rms ul 1577 component recognition program file number: e207481 rated 2,500v rms for 1 minute (soic, pdip) soldering profile per jedec j-std-020c electrostatic discharge sensitivity this product has been tested for electrostatic sensitivity to the limits stated in the specifications. however, nve recommends that all integrated circuits be handled with appropriate care to avoid damage. damage caused by inappropriate handling or storage could range from performance degradation to complete failure.
il600a series 3 il610a pin connections 1 nc no internal connection 2 in+ coil connection 3 in coil connection 4 nc no internal connection 5 gnd ground return for v dd 6 out data out 7 v oe output enable. internally held low with 100 k : 8 v dd supply voltage il610a il611a pin connections 1 in 1 + channel 1 coil connection 2 in 1 channel 1 coil connection 3 in 2 + channel 2 coil connection 4 in 2 channel 2 coil connection 5 gnd ground return for v dd 6 out 2 data out, channel 2 7 out 1 data out, channel 1 8 v dd supply voltage il611a il612a pin connections 1 in 1 data in, channel 1 2 v dd1 supply voltage 1 3 out 2 data out, channel 2 4 gnd 1 ground return for v dd1 5 gnd 2 ground return for v dd2 6 in 2 data in, channel 2 7 v dd2 supply voltage 2 8 out 1 data out, channel 1 il612a in 1 +v dd in 1 - out 1 in 2 + out 2 in 2 - gnd in 1 out 1 v dd1 v dd2 out 2 in 2 gnd 1 gnd 2 nc v dd in+ v oe in- out nc gnd
il600a series 4 electrical specifications electrical specifications are t min to t max and 3.0 v to 5.5 v unless otherwise stated. parameters symbol min. typ. max. units test conditions coil input impedance z coil 85||9 p ||nh t amb = 25c v dd = 3.0 v to 5.5 v temperature coeff of coil resistance tc r coil 0.2 0.25 : /c v dd = 3.0 v to 5.5 v input threshold for output logic high i inh 0.5 1 ma single or differential v dd = 3.0 v to 5.5 v input threshold for output logic low i inl 5 3.5 ma single or differential v dd = 3.0 v to 5.5 v quiescent current il610a, i dd il611a, i dd il612a, i dd1 il612a, i dd2 2 4 2 2 3 6 3 3 ma ma ma ma v dd = 5 v, i in =0 r pullup = open circuit quiescent current il610a, i dd il611a, i dd il612a, i dd1 il612a, i dd2 1.3 2.6 1.3 1.3 2 4 2 2 ma ma ma ma v dd = 3.3 v, i in =0 r pullup = open circuit logic high output voltage (1) v oh v dd v off state 0 0.1 v i o = 20 p a logic low output voltage v ol 0.4 0.8 i o = 4 ma logic output current |i o | 7 10 ma switching specifications at 5v parameters symbol min. typ. max. units test conditions input signal rise and fall times t ir , t if 10 p s see test circuit 1 data rate 10 mbps see test circuit 1 minimum pulse width pw 100 ns see test circuit 1 propagation delay input to output (high to low) t phl 20 25 ns see test circuit 1 propagation delay input to output (low to high) t plh 50 75 ns see test circuit 1 common mode transient immunity |cm h |,|cm l | 15 20 kv/ p s v t = 300 v peak i fs-high 25 0.5 ma failsafe operation input current (2) i fs-low 8 5 ma see test circuit 1 switching specifications at 3.3v parameters symbol min. typ. max. units test conditions input signal rise and fall times t ir , t if 10 p s see test circuit 1 data rate 10 mbps see test circuit 1 minimum pulse width pw 100 ns see test circuit 1 propagation delay input to output (high to low) t phl 20 25 ns see test circuit 1 propagation delay input to output (low to high) t plh 50 75 ns see test circuit 1 common mode transient immunity |cm h |,|cm l | 15 20 kv/ p s v t = 300 v peak failsafe operation input current (2) i fs-high 25 0.3 ma see test circuit 1 notes: 1. v dd refers to the supply voltage on the output side of the isolated channel. 2. failsafe operation is defined as the guaranteed output state which will be achieved if the dc input current falls between th e input levels specified (see test circuit 1 for details). note if failsafe to logic low is required, power supply voltages must be set to 5 v. failsafe low on 3.3 v supplies is not specified but will typically require at least 8 ma of coil current.
il600a series 5 test circuits the test circuits below were used to obtain the specificati ons on the previous pages. in differential mode, the boost capacitor is generally not required, but it may be used to increase external magnetic field immunity. +v v dd gnd 1 gnd 3 2 5 6 7 8 15pf 10nf r limit c boost 1 2 2k il610a - + +v v dd gnd 1 gnd 2 3 2 5 6 7 8 - + 1k 15 pf 10 nf gnd 11 2 1k il610a r limit 2k test circuit 1 (single-ended) test circuit 2 (differential) operation il600-a series isolators are current mode devices. changes in cu rrent flow into the input coil result in logic state changes at the output. one of the significant advantages of the passive coil input is that both singl e ended and differential inputs can be ha ndled without reverse bias protection. the gmr sensor switche s the output to logic low if current flows from (in ) to (in+). resistors set the coil input current to the 5 ma minimum. there is no limit to input voltages because there are no semiconductor input structures. the absolute maximum current through the coil of the il600-series is 25 ma dc, or 75 ma in differential mode. the worst-case logic low threshold current is 5 ma. wh ile typical threshold currents are actually less, nve recommends 5 ma logic low thresholds as a minimum design value. in all cases, the current must flow from in to in+ in the coil to sw itch the output low. this is the case for true or inverted data, in single-ended or diffe rential configurations. output logic high is the zero input curr ent state. note that current flowing from coil+ to co il- (negative current in the specifications ) will push the gmr sensor further into th e high state. figure 1 shows the response of the il600-series. the gmr bridge st ructure is designed so the out put of the isolator is logic hi gh with no signal present. the output will switch to the low state w ith approximately 3.5 ma of coil current, and switch back to t he high state when the input current falls below 1.5 ma. this allows glitch-free interface with low slew rate signals. to calculate the value of the protection resistor (r1), use ohm?s law as shown in the examples below. note that only the magnitude of the voltage across the coil is important; the absolute values of v inh and v inl are arbitrary.
il600a series 6 calculating limiting resistor value example 1 . in this case, t nom = 25oc, v in high = 24 v, v in low = 1.8 v, r coil =85 : and i coil minimum is specified as 5 ma. total loop resistance is: (r1+r coil ) = (v inh v inl ) = 22.2 : = 4440 : i coil 0.005 therefore: r1 = 4440 : 85 : = 4355 : example 2 . at a maximum operating temperature of 85c: t max = 85oc, t nom = 25oc, v in high = 5 v, v in low = 0 v, and nominal r coil = 85 : . at t max = 85oc: r coil = 85 + (t max t nom ) x tcr coil = 85 + (85 25) x 0.2 = 85 + 12 = 97 : therefore, the recommended series resistor is: r1 = (v inh v inl ) ? r coil i coil r1 = (5 0) 97 = 903 : 0.005 allowance should also be made for the temperature coefficient of the current limiting resistor to ensure that i coil is at least 5 ma at the maximum operating temperature. failsafe operation internal failsafe biasing ensures the output will always switch to the high state if the input coil is open-circuit. this is tr ue for either 5 v or 3.3 v output supplies. the specifications on pages 5 and 6 show the enhanced failsafe conditions available with t he il600a-series isolators that cover the non-open circuit condition. the output will remain in the state specified, or will switc h to that state, if the specified current is fl owing in the coil. note that positive values of current mean current flow into the in input (pin 3 in test circuit 1). single-ended or differential input the il610a and il611a can be run with single-ended or differential inputs. in differential mode, coil current reverses each cyc le. in single-ended mode, a ?boost capacitor? placed across the current limit resistor provides pulsed current reversal for correct operation. in the differential mode, current will naturally flow through the coil in both directions without the boost cap, alt hough the cap can still be used if application factors such as increas ed external field immunity or improved pwd performance mandate. absolute maximum recommended coil current in single-ended m ode is 25 ma while differential mode allows up to 75 ma to flow. the difference in specifications is due to the risk of electromigration of coil metals unde r constant current flow. in si ngle ended mode, long-term dc current flow above 25 ma can cause er osion of the coil metal (rather like river flow does to its banks ). 3.5 5 high low logic state coil current ma 1.5 t t figure 1. il600a-series transfer function v inh v inl i coil r1 85 input coil figure 2. limiting resistor calculation equivalent circuit
il600a series 7 2500 16 5000 3 500 1000 signal rise/fall time (ns) c boost (pf) 2500 16 5000 3 500 1000 signal rise/fall time (ns) c boost (pf) in differential mode, erosion takes place in both directions as each current cycle reverses and has a net effect of zero up to the fuse current. a current of more than 100 ma will cause the coil to irreparably fuse open. there are many applications where the differential option can be very useful. one advantag e over optocouplers and other high- speed couplers is that no reverse bias prot ection for the input structure is required for a differential signal. this reduces c ost and complexity. one of the more common applications is for an isolated differential line receiver. for example, rs-485 can drive an il610 directly for a fraction of the cost of an isolated rs-485 node (see illustrative applications section). typical resistor values the table shows typical values for the externa l resistor in 5 v and 3 v logic systems. as always, these values as approximate and should be adjusted for temperature or other application specifics if the expected temperature range is large, 5% or even 1% tolerance resistors may provide additional design margin. alternatively, see the applications information section for circuit ideas allowing mo re generalized resistor selection. boost capacitor the boost capacitor in parallel with the current-limiting resistor boosts the instantaneous coil current at the signal transition. the boost pushes the gmr bridge output through the comparator threshold voltage with less propagation delay and pulse width distortion. the instantaneous boost capacitor current is proportional to input edge speeds ( ). select a capacitor value based on the rise and fall times of the input signal to be isolated that provides approximately 20 ma of additional ?boost? current. figure 3 is a guide to boost capacitor selection. for standard logic signals (t r ,t f < 10 ns), a 16 pf capacitor is recommended. the capacitor value is generally not critical, and can often vary 50% with little noticeable difference in device performance. dynamic power consumption power consumption is proportional to duty cy cle, not data rate. the use of nrz c oding minimizes power dissipation since no additional power is consumed when the output is in the high state. in differential mode, where the logic high condition may sti ll require a current to be forced through the coil, power consumption will be higher than a typical nrz single ended configuration . power supply decoupling 47 nf ceramic capacitors are recommended to decouple the power supplies. the capacitors should be placed as close as possible t o the appropriate v dd pin for optimal output wave shaping. v coil 0.125w, 10% resistor 3.3 v 560 : 5 v 910 : figure 3. c boost selector dv dt c
il600a series 8 applications information il600a-series isolators are current mode devices. this means that a current of a certain magnitude and direction must flow in t he input coil to change the output logic stat e. figure 4 shows a simplified transfer curve for a typical il600a-series data channe l. the transfer function for this device is approximately linear. an applied coil input current creates a magnetic field that causes the gmr bridge output to change in proportion to the applied field. the gmr bridge is connected to a comparator. when the bridge output is greater than the comparator high threshold level, the output will go high. similarly, when the bridge output is less than the comparator low threshold, the output will go low. the ?window of operation? shown in figure 4 highlights the specified corners of device operation. an input current of approximately 3.5 ma or 1.5 ma will cause the device to hover around the comparator switching thresholds producing an unstable output. for single-ended operation across the entire temp erature range and power supply range, the magnitude of the co il current for a logic low should be at least 5 ma, and the magnitude of the coil current for a logic high should be between 0.5 ma and 0 ma. the stated direction of the current is negative in figure 4 because the magnetic field is negative with respect to ea rth field. current is always fed into the in terminal of an il600a-series device. since these currents are actually sourced, not sunk, by the user, the specified currents are quoted as positive values in the electrical specifications section of this data sheet. when designing circuits using digital logic, most designers are aware that the input to a logic gate is differential with respe ct to ground. separate ground layers, star points or planes usually need to be designed into circuit boards with fast switching curre nts to reduce ground voltage bounce caused by inductance in ground returns. ground error voltages can cause data errors in high-speed circuits due to their impact on the effective logic threshold vo ltage at any given instant. similarly, when using il600a-series devices, the designer should be aware that it is the voltage magnitude across the coil that creates the current, not just the v alue of the input voltage. to illustrate this point, consider the single-ended non-inverting and inverting cases. coil current (ma) bridge o/p (mv) comparator low threshold comparator high threshold -7 -6 -5 -4 -3 -2 -1 0 -10 -9 -8 -40 -20 60 40 20 10 5 window of operation -60 bridge output response figure 4. il600a series transfer function
il600a series 9 in the non-inverting circuit, the in terminal is connected via a 1 k : current-limiting resistor to the supply rail, and the input is connected to the in+ terminal. assume the supply voltage is +5 v and the input signal is a 5 v cmos signal. a 1 k : resistance is selected to limit the co il current to 5 ma. for the purpose of this illustration we will ignore the coil resistance. when a logic high (+5 v) is applied to the input, the current through the coil is zero. when the input is a logic low (0 v), approximately 5 ma flows through the coil from the in side to the in+ side. figure 4 shows that the device will transition to both logic states easily under these conditions. now assume that the 5 v rail is at 5.5 v and the cmos input signal is loaded so that its high level is only 4.5 v. when a logic high (4.5 v) appears on the input, there is still a current of 1ma flowing through the coil. figure 4 shows that the device is getting close to the off-state threshold of 1.5 ma, and now exceeds the specification of 0.5 ma for this logic level. some intermittent operation or complete non-function should be expected in this case. the designer must ensure that the difference between the logic high voltage and the power supply voltage is such that the re sidual current in the coil is lower than 0.5 ma. the inverting configuration design problem is similar to the problems associated with standard logic. in the inverting configuration, the signal into the coil is differential with respect to ground. the designer must ensure that the difference between the logic low voltage and the coil ground is such that the residual coil current is less than 0.5 ma. conventional ground bounce design precautions apply. the il612a does not offer inverting operation because the coil in inputs are internally hardwired to the device power supply. therefore it is important to ensure the isolator power supply is at the same voltage as the power supply to the source of the i nput logic signal. il600 devices are simple to use as long as it is remembered th at there must be enough coil current (5 ma) to ensure logic low output, and close to zero current (0.5 ma to 0 ma) to ensure logic high output. figure 5. inverting and non-inverting circuits +5 v v dd gnd 1 gnd 2 c 1 1k 3 2 5 6 8 il610a non-inverting circuit - + r l data in data out note. c 1 is 47 nf ceramic. c boost +5 v v dd gnd 1 gnd 2 c 1 1k 3 2 5 6 8 il610a non-inverting circuit - + r l data in data out note. c 1 is 47 nf ceramic. c boost +5 v v dd gnd 1 gnd 2 c 1 1k 3 2 5 6 8 note. c 1 is 47 nf ceramic. il610a inverting circuit - + r l data in data out c boost +5 v v dd gnd 1 gnd 2 c 1 1k 3 2 5 6 8 note. c 1 is 47 nf ceramic. il610a inverting circuit - + r l data in data out c boost
il600a series 10 electromagnetic compatibility and magnetic field immunity because il600-series isolators are completely static, they have the lowest emitted noise of any non-optical isolators. isoloop devices operate by imposing a magnetic field on a gmr sensor, which translates the change in field into a change in log ic state. there are several ways of enhancing magnetic field imm unity. the devices are manufactured with a magnetic shield above the sensor. the shield acts as a flux concentrator to boost the ma gnetic signal from the internal coil, and as a shield against external magnetic fields. the shield absorbs surrounding stray flux until it becomes saturated. at saturation the shield is transparent to external applied fields, and the gmr sensor may react to the field. to compensate for this effect, isoloop isolators use wheatstone bridge structures that are only sensitive to differential magnetic fields. providing a larger internal field will reduce the e ffect of an external field on the gmr sensor. immunity to external magnetic fields can also be enhanced by proper orientation of the device with respect to the field directi on, the use of differential signaling, and field boosting capacitors. two ways to enhance immunity to external magnetic field are summarized below. 1. orientation of the device with respect to the field direction an applied field in the ?h1? direction is the worst case for magnetic immunity. in this case the external field is in the same direction as the applied internal field. in one direction it will tend to help switching; in th e other it will hinder switching. this can cause unpredictable operation. an applied field in direction ?h2? has considerably less effect and results in higher magnetic immunity. nc v dd in+ v oe in- out nc gnd 2. differential signaling and boost capacitors regardless of orientation, driving the coil differentially improves magnetic immunity. this is because the logic high state is driven by an applied field instead of zero fiel d, as is the case with single-ended operation. the higher the coil current, the higher the internal field, and the higher th e immunity to external fields. optimal magnetic immunity is achieved by adding the boost capacitor. method approximate immunity immunity description field applied in h1 direction 20 gauss a dc current of 16 a flowing in a conductor 1 cm from the device could cause disturbance. field applied in h2 direction 70 gauss a dc current of 56 a flowing in a conductor 1 cm from the device could cause disturbance. field applied in any direction but with field booster capacitor (16 pf) in circuit 250 gauss a dc current of 200 a flowing in a conductor 1 cm from the device could cause disturbance. data rate and magnetic field immunity it is easier to disrupt an isolated dc signal with an external magnetic field than it is to disrupt an isolated ac signal. simi larly, a dc magnetic field will have a greater effect on the device than an ac magnetic field of the same effective magnitude. for example, signals with pulses greater than 100 p s long are more susceptible to magnetic fields than shorter pulse widths. h1 h2
il600a series 11 illustrative applications gnd 2 v dd2 c boost 3 2 5 6 7 8 c 2 2 3 2 il610a - + b/z isl8485 d c 1 v dd1 gnd 1 4 5 7 1 notes: c boost is application specific all other capacitors are 47 nf ceramic a/y 8 6 1 r r isolated rs-485 and rs-422 receivers using il610as il610as can be used as simple isolated rs-485 or rs-422 receivers, terminating signals at the il610a for a fraction of the cost of an isolated node. cabling is greatly simplified by eliminating the need to power the input side of the receiving board. no current-limiting resistor is needed for a single receiver because it will draw less current than the driver maximum. current limiting resistors allow at least eight nodes without exceeding the maximum load of the transceiver chip. placement of the current-limiting resistors on both lines provides better dynamic signal balance. there is no need for line termination resistors because the il610a coil resistance of approximately 85 is close to the characteristic impedance of most cables. the circuit is intrinsically open circuit failsafe because the il610a is guaranteed to switch to the high state when the coil input current is less than 500 a. for higher speed, a faster output device (such the cmos-output il600-series isolat ors) are needed as well as possibly better impedance matching. number of nodes current limit resistors ( : ) 1 none 2 17 3 22 4 27 5 27 6 27 7 30 8 30
il600a series 12 isolated 120 v line monitor the wide input voltage range of il600 isolators allow connection to line voltage through current-limiting resistors. in this illustrative circuit, ?monitor out? goes low when line voltage exceeds approximately 100 v, and high when line voltage drops below approximately 10 v. system error r +5 v gnd 1 notes: c boost is application specific all other capacitors are 47 nf ceramic l +5 v c 3 1k v 3 3 2 8 6 5 sensor 3 c boost - + il610a c 2 1k v 2 3 2 8 6 5 sensor 2 c boost - + il610a c 1 1k v 1 3 2 8 6 5 sensor 1 c boost - + il610a multi-channel isolated alarm monitor the open-drain outputs of il600a-series isolators allow wired-o r outputs. the inputs can be configured for inverting or non- inverting operation (see applications information), and a very wide input voltage range is possible. this illustrative circuit provides fail-safe output (logic high output for zero coil current) and typical logic output sink current of 10 ma for each iso lator. 2k +5 v neutral 10k load 47nf 0.5w monitor out 3 2 5 6 8 - + il610a gnd 1 10k 0.5w live 120v
il600a series 13 8 7 5 6 2 1 3 4 5v 5v gnd 1 gnd 2 2k2 10k 750r 750r c 3 c 2 c 1 3 2 8 1 4 ? p82b96 sda 270 pf 16 pf sda_iso notes: c1, c2, and c3 are 47nf ceramic resistor values change for 3 v operation 750r v dd2 v dd1 il612a isolation of i 2 c nodes this circuit provides bidirectional isolati on of i2c bus signals with no restrictions on data rate and none of the i2c bus latc h-up problems common with other isolation circuits.
il600a series 14 package drawings, dimensions and specifications 8-pin msop 0.114 (2.90) 0.114 (2.90) 0.016 (0.40) 0.005 (0.13) 0.009 (0.23) 0.027 (0.70) 0.010 (0.25) 0.028 (0.70) 0.002 (0.05) 0.043 (1.10) 0.032 (0.80) 0.006 (0.15) 0.016 (0.40) 0.024 (0.60) 0.189 (4.80) 0.197 (5.00) 0.122 (3.10) 0.122 (3.10) 6? 0? pin spacing is a basic dimension; tolerances do not accumulate note: 8-pin soic package 0.013 (0.33) 0.020 (0.50) 0.189 (4.8) 0.197 (5.0) 0.150 (3.8) 0.157 (4.0) dimensions in inches (mm) 3 2 1 0.228 (5.8) 0.244 (6.2) 0.008 (0.19) 0.010 (0.25) 0.010 (0.25) 0.020 (0.50) x45o 0o 8o 0.016 (0.40) 0.050 (1.27) 0.040 (1.0) 0.060 (1.5) 0.054 (1.37) 0.069 (1.75) 0.004 (0.10) 0.010 (0.25) pin spacing is a basic dimension; tolerances do not accumulate note: 8-pin pdip 0.36 (9.0) 0.40 (10.2) pin spacing is a basic dimension; tolerances do not accumulate note: 0.24 (6.1) 0.26 (6.6) 0.29 (6.4) 0.31 (7.9) 0.30 (7.6) 0.37 (9.4) 0.008 (0.2) 0.015 (0.4) 0.030 (0.76) 0.045 (1.14) 0.015 (0.38) 0.023 (0.58) 0.045 (1.14) 0.065 (1.65) 0.09 (2.3) 0.11 (2.8) 0.015 (0.38) 0.035 (0.89) 0.12 (3.05) 0.15 (3.81)
il600a series 15 ordering information and valid part numbers il 610 a - 1 e tr13 il610a valid part numbers IL610A-1E il610a-2e il610a-3e il610a-5 IL610A-1Etr7 il610a-3etr7 IL610A-1Etr13 il610a-3etr13 il611a valid part numbers il611a-1e il611a-2e il611a-3e il611a-1etr7 il611a-3etr7 il611a-1etr13 il611a-3etr13 il612a valid part numbers il612a-2e il612a-3e il612a-3etr7 il612a-3etr13 bulk packaging blank = tube tr7 = 7'' tape and reel tr13 = 13'' tape and reel package e = rohs compliant package type -1 = msop -2 = pdip -3 = soic -5 = bare die output type blank = cmos output a = open drain output base part number 610 = single channel 611 = 2 transmit channels 612 = 1 transmit channel, 1 receive channel product family il = isolators rohs compliant
il600a series 16 revision history isb-ds-001-il600a-t september 2010 changes x additional changes to pin spacing specification on msop package drawing. isb-ds-001-il600a-s changes x changed pin spacing specification on msop package drawing. isb-ds-001-il600a-r changes x clarified failsafe operation input current (p. 4). isb-ds-001-il600a-q changes x p. 2?deleted msop iec61010 approval. isb-ds-001-il600a-p changes x added emc details. isb-ds-001-il600a-o changes x clarified i 2 c application diagram and expanded caption (p. 13). isb-ds-001-il600a-n changes x iec 61010 approval for msop versions. isb-ds-001-il600a-m changes x specify coil resistance as typical only. x revise section on calculating limiting resistors. isb-ds-001-il600a-l changes x note on all package drawings that pin-spacing tolerances are non-accumulating; change msop pin-spacing dimensions and tolerance accordingly. isb-ds-001-il600a-k changes x change lower limit of length on pdip package drawing. x tightened pin-spacing tolerance on msop package drawing. isb-ds-001-il600a-j changes x changed ordering information to reflect that devices are now fully rohs compliant with no exemptions. isb-ds-001-il600a-i changes x added differential drive specifications x eliminated soldering profile chart isb-ds-001-il600a-h changes x changed rs-485 transceiver x revised i 2 c circuit component values isb-ds-001-il600a-g changes x added enhanced failsafe specification isb-ds-001-il600a-f changes x minor changes to circuit diagrams x expanded captions for illustrative applications. isb-ds-001-il600a-e changes x misc. typographical and syntax changes.
il600a series 17 about nve an iso 9001 certified company nve corporation manufactures innovative products based on unique spintronic giant magnetoresistive (gmr) technology. products include magnetic field sensors, magnetic field gradie nt sensors (gradiometers), digital magnetic field sensors, digital signal isolators, and isolated bus transceivers. nve pioneered spintronics and in 1994 introduced the world?s fi rst products using gmr material, a line of ultra-precise magneti c sensors for position, magnetic media, gear speed and current sensing. nve corporation 11409 valley view road eden prairie, mn 55344-3617 usa telephone: (952) 829-9217 fax: (952) 829-9189 internet: www.nve.com e-mail: isoinfo@nve.com the information provided by nve corporation is believed to be accurate. however, no responsibility is assumed by nve corporation for its use, nor for any infringement of patents, nor rights or licenses granted to third parties, which may result from its use. no license is granted by implication, or otherwise, under any patent or patent rights of nve corporation. nve corporation does not authorize, nor warrant, any nve corporation product for use in life support devices or systems or other critical applications, without the express written approval of the president of nve corporation. specifications are subject to change without notice. isb-ds-001-il600a-t september 2010

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